Untitled_Kernel/src/interrupts.s
lordtet 55d5823bde Added tons of documentation
Still need to document a lot of functions, but I cleaned up and
explained a lot of the code via comments.
2025-06-28 02:11:09 -04:00

55 lines
1.6 KiB
ArmAsm

; Interrupts.s - Implementations of IA32 interrupts.
;Let's make an interrupt pointer table so C can reference it and build the IDT.
global isr_ptrs
extern generic_isr_handler
;By the time we get here, we actually have a rather consistent stack:
; dword [Interrupt ID]
; dword [Error code (0 if int has no error code field)]
; dword [EIP]
; dword [CS]
; dword [EFLAGS]
; We can pass this to C. First, we might want to push all of our registers or something.
isr_common:
pusha
push esp ;Throwing a pointer to ESP in there for referencing the aforementioned stuff as a struct
call generic_isr_handler
add esp,4 ;Remove that esp ref from the stack
popad ;restore our gp registers
add esp,8 ;deallocate the error code from the stack before heading out
iret
;Macro for the isr: 1 argument for the interrupt ID
%macro ISR_ENTRY 1
;isr_int#
isr_%1:
cli
;Small table of interrupts that don't have an error code associated, so we push a dummy for stack consistency.
%if %1 = 8 || %1 = 10 || %1 = 11 || %1 = 12 || %1 = 13 || %1 = 14 || %1 = 17 || %1 = 21
%else
push dword 0
%endif
;This is us pushing the isr #, which is also just the interrupt ID. Useful later.
push dword %1
jmp isr_common
%endmacro
;This is to trigger the above macro once for every ISR.
%assign j 0
%rep 255
ISR_ENTRY j
%assign j j+1
%endrep
; Generate a table of pointers that point to each of our ISRs. This will be accessed from C to setup our IDT.
isr_ptrs:
%assign i 0
%rep 255
dd isr_ %+ i
%assign i i+1
%endrep
isr_ptrs_end: