2025-06-11 04:27:15 +00:00
|
|
|
global gdtr
|
|
|
|
|
|
|
|
|
|
section .gdt_sect
|
|
|
|
|
gdt:
|
|
|
|
|
;Null descriptor
|
|
|
|
|
dd 0x00000000
|
|
|
|
|
dd 0x00000000
|
|
|
|
|
;Kernel code segment.
|
|
|
|
|
;Limit: in 4kib pages. 0xFFFFF * 4K = full address space.
|
|
|
|
|
dw 0xFFFF
|
|
|
|
|
;Base: Start at 0. We want the whole thing.
|
|
|
|
|
dw 0
|
|
|
|
|
;ALSO BASE: bits 16-23. All zeroes, still.
|
|
|
|
|
db 0
|
|
|
|
|
;Access byte. Defines flags for access permissions to the segment. This segment is:
|
|
|
|
|
;RX, and code/data segment
|
|
|
|
|
db 0b10011010
|
|
|
|
|
;Next two segments are nibbles so I put them together (cant db only a nibble at once).
|
|
|
|
|
;Upper limit bits (right hand nibble) is all ones to fill out the full 4gib in pages
|
|
|
|
|
;Flags (left hand nibble) are set to say that the limit is meant to be read as pages, and we're working in 32bit.
|
|
|
|
|
db 0b11001111
|
|
|
|
|
;Final upper base bits. Still zero lol.
|
|
|
|
|
db 0
|
|
|
|
|
;Done! Now we move onto our next table entries, they are back to back.
|
|
|
|
|
;Kernel Data Segment
|
|
|
|
|
dw 0xFFFF
|
|
|
|
|
dw 0
|
|
|
|
|
db 0
|
|
|
|
|
db 0b10010010
|
|
|
|
|
db 0b11001111
|
|
|
|
|
db 0
|
|
|
|
|
;User Code Segment
|
|
|
|
|
dw 0xFFFF
|
|
|
|
|
dw 0
|
|
|
|
|
db 0
|
|
|
|
|
db 0b11111010
|
|
|
|
|
db 0b11001111
|
|
|
|
|
db 0
|
|
|
|
|
;User Data Segment
|
|
|
|
|
dw 0xFFFF
|
|
|
|
|
dw 0
|
|
|
|
|
db 0
|
|
|
|
|
db 0b11110010
|
|
|
|
|
db 0b11001111
|
|
|
|
|
db 0
|
|
|
|
|
;Task State Segment
|
|
|
|
|
;For a lot of this it's going to be zeroes so we can do it dynamically later (such as finding &tss).
|
|
|
|
|
;Really, we just want to set the access bytes correctly.
|
|
|
|
|
dd 0
|
|
|
|
|
db 0
|
|
|
|
|
db 0b10001001
|
|
|
|
|
dw 0
|
2025-06-28 04:14:42 +00:00
|
|
|
gdt_end:
|
2025-06-11 04:27:15 +00:00
|
|
|
gdtr:
|
2025-06-28 04:14:42 +00:00
|
|
|
dw gdt_end - gdt - 1
|
2025-06-11 04:27:15 +00:00
|
|
|
dd gdt
|
|
|
|
|
|