lordtet
561c7f9fa7
Many code changes, many undocumented. Documentation and cleanup is next. Fixed a lot of bugs related to IDT structure. Changed the IDT paradigm to be dynamically written isntead of statically to account for nobits on that section. Also added a gdb remote debugger automatic script, for simplicity in debugging.
57 lines
1.7 KiB
ArmAsm
57 lines
1.7 KiB
ArmAsm
global gdtr
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section .gdt_sect
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gdt:
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;Null descriptor
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dd 0x00000000
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dd 0x00000000
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;Kernel code segment.
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;Limit: in 4kib pages. 0xFFFFF * 4K = full address space.
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dw 0xFFFF
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;Base: Start at 0. We want the whole thing.
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dw 0
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;ALSO BASE: bits 16-23. All zeroes, still.
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db 0
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;Access byte. Defines flags for access permissions to the segment. This segment is:
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;RX, and code/data segment
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db 0b10011010
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;Next two segments are nibbles so I put them together (cant db only a nibble at once).
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;Upper limit bits (right hand nibble) is all ones to fill out the full 4gib in pages
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;Flags (left hand nibble) are set to say that the limit is meant to be read as pages, and we're working in 32bit.
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db 0b11001111
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;Final upper base bits. Still zero lol.
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db 0
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;Done! Now we move onto our next table entries, they are back to back.
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;Kernel Data Segment
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dw 0xFFFF
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dw 0
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db 0
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db 0b10010010
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db 0b11001111
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db 0
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;User Code Segment
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dw 0xFFFF
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dw 0
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db 0
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db 0b11111010
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db 0b11001111
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db 0
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;User Data Segment
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dw 0xFFFF
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dw 0
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db 0
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db 0b11110010
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db 0b11001111
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db 0
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;Task State Segment
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;For a lot of this it's going to be zeroes so we can do it dynamically later (such as finding &tss).
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;Really, we just want to set the access bytes correctly.
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dd 0
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db 0
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db 0b10001001
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dw 0
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gdt_end:
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gdtr:
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dw gdt_end - gdt - 1
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dd gdt
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